During the integrated circuit (“IC”) manufacturing process, contaminants, such as particles, photoresist residue and the like, are introduced on the IC substrate surface. It is important to eliminate or reduce the presence of these contaminants as they adversely impact the performance and function of the IC that is ultimately produced. Accordingly, various cleaning methods have been implemented to remove such undesirable contaminants. Such cleaning methods typically clean the IC substrates, which are undergoing processing, either one substrate at a time or clean a number of IC substrates simultaneously in a single cleaning cycle. In the context of cleaning semiconductor wafers, cleaning one wafer at a time is known as single wafer cleaning and it involves cleaning a single semiconductor wafer during a single cleaning cycle. In contrast, cleaning many semiconductor wafers simultaneously during a single cleaning cycle is known as batch wafer cleaning. Of these two types of cleaning methods, single wafer cleaning has emerged as a more desirable cleaning method for many processing steps in IC fabrication and particularly for 300 mm semiconductor wafer fabrication.
A cleaning chemistry commonly used in the single wafer cleaning technology employs a relatively low concentration of ammonium hydroxide solution known as the Standard Cleaning Solution 1 (the “SC-1 solution”). In the relatively low concentrations of SC-1 solution for single wafer cleaning, typically heated ammonium hydroxide, hydrogen peroxide and deionized water are present in a volume ratio of approximately 1:1:500. During cleaning, the SC-1 solution contacts the wafer surface in the presence of megasonic energy. It is believed that the SC-1 solution detaches contaminants from the substrate surface through surface etching and that the megasonic energy further removes the detached contaminant from the substrate surface. Although this method has been the cleaning method of choice for most in the semiconductor industry during the last forty years, it suffers from several drawbacks.
For example, conventional cleaning solutions run the risk of unduly etching and further degrading features on the semiconductor wafer surface. Such degradation is explained in greater detail by way of example hereinafter. FIG. 1A shows a partially fabricated semiconductor wafer surface 10 having defined thereon regions 12, where a semiconductor chip is ultimately fabricated. Each region 12 includes poly silicon lines 14, which may serve as a gate electrode for a semiconductor transistor. A perspective view of poly silicon lines 14 in FIG. 1A shows that they are disposed on the wafer surface as upright tower-like structures. Each such poly silicon tower is separated from its adjacent or neighboring poly silicon tower by a distance “d.” Currently in the IC fabrication technology, with features approaching progressively smaller sizes, a distance “d” separating two poly silicon towers of about 65 nm or less is of particular interest. Unfortunately, cleaning single wafers, which have poly silicon geometries that are about 65 nm or less, one at a time using conventional methods, such as by SC-1 solution, leads to feature degradation, i.e., neighboring poly silicon towers 14 collapse on each other. FIG. 1B shows that poly silicon towers 14′, which are shown in their upright position in FIG. 1A and denoted by reference numeral 14, collapse on their neighboring poly silicon tower. Collapsed poly silicon towers 14′ short circuit the chip circuitry, rendering the entire chip inoperable. Consequently, the conventional cleaning techniques deal a devastating blow to the yield of patterned wafers having poly silicon geometries that are about 65 nm or less.
It is not entirely clear exactly why the poly silicon towers on the wafer surface collapse during cleaning. It is believed that the surface tension caused by the cleaning solution between the towers and the megasonic energy may be at least partially responsible. It is also believed that during cleaning, the effective concentration of the active cleaning agent, i.e., ammonium hydroxide in the SC-1 solution or hydro fluoric acid present in other cleaning chemistries, etch away an oxidized protective layer of native silicon dioxide, which coats the poly silicon towers, and makes the underlying poly silicon structure vulnerable to attack by the active cleaning agent. The active cleaning agent reacts with and weakens the poly silicon structures and at least partially contributes to the collapse shown in FIG. 1B.
What is therefore needed are novel systems, methods and compositions for single wafer cleaning technology, which do not suffer the drawbacks encountered by conventional cleaning and effectively clean IC substrate surfaces having the current and future miniature poly silicon geometries.